Vol. E89-A, No. 4 April 2006

Open Access Open Access  Restricted Access Subscription Access

Table of Contents

Foreword

FOREWORD PDF
Yoshifumi NISHIO 839-839

Letters

Design of IIR Digital Filters with Discrete Coefficients Based on MLS Criterion PDF
Masayoshi NAKAMOTO, Takao HINAMOTO 1116-1121
Robustness Bounds for Receding Horizon Controls of Continuous-Time Systems with Uncertainties PDF
ChoonKi AHN, SooHee HAN, WookHyun KWON 1122-1125
Connectivity-Based Image Watermarking PDF
Jian LUO, Hongxia WANG 1126-1128
DWT Domain On-Line Signature Verification Using the Pen-Movement Vector PDF
Isao NAKANISHI, Hiroyuki SAKAMOTO, Naoto NISHIGUCHI, Yoshio ITOH, Yutaka FUKUI 1129-1131
A Code Whose Codeword Length is Shorter than n in Almost All of Sufficiently Large Positive Integers PDF
Hirofumi NAKAMURA, Sadayuki MURASHIMA 1132-1139
Lower Bounds on Two-Dimensional Generalized Orthogonal Sequences PDF
Fanxin ZENG, Zhenyu ZHANG, Lijia GE 1140-1144
Bootstrapped Modified Weighted Bit Flipping Decoding of Low Density Parity Check Codes PDF
Yoichi INABA, Tomoaki OHTSUKI 1145-1149
Diversity Combining for Soft/Softer Hand-Over in DS-CDMA PDF
Jungwoo LEE 1150-1153
Per-User Automatic Gain Control for an Uplink CDMA Receiver PDF
Jungwoo LEE 1154-1157

Papers

Modeling the Influence of Input-to-Output Coupling Capacitance on CMOS Inverter Delay PDF
Zhangcai HUANG, Atsushi KUROKAWA, Yun YANG, Hong YU, Yasuaki INOUE 840-846
Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills PDF
Atsushi KUROKAWA, Akira KASEBE, Toshiki KANAMOTO, Yun YANG, Zhangcai HUANG, Yasuaki INOUE, Hiroo MASUDA 847-855
Determination of Interconnect Structural Parameters for Best- and Worst-Case Delays PDF
Atsushi KUROKAWA, Hiroo MASUDA, Junko FUJII, Toshinori INOSHITA, Akira KASEBE, Zhangcai HUANG, Yasuaki INOUE 856-864
A Method to Derive SSO Design Rule Considering Jitter Constraint PDF
Koutaro HACHIYA, Hiroyuki KOBAYASHI, Takaaki OKUMURA, Takashi SATO, Hiroki OKA 865-872
Investigation of Class E Amplifier with Nonlinear Capacitance for Any Output Q and Finite DC-Feed Inductance PDF
Hiroo SEKIYA, Yoji ARIFUKU, Hiroyuki HASE, Jianming LU, Takashi YAHAGI 873-881
A Chaotic Burst in a Modified Discrete-Time Neuron Model PDF
Hiroto TANAKA 882-886
Dead Problem of Program Nets PDF
Shingo YAMAGUCHI, Kousuke YAMADA, Qi-Wei GE, Minoru TANAKA 887-894
Entropy Based Associative Memory PDF
Masahiro NAKAGAWA 895-901
A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy PDF
Ken UENO, Tetsuya HIROSE, Tetsuya ASAI, Yoshihito AMEMIYA 902-907
Complex Bandpass ΔΣAD Modulator Architecture without I, Q-Path Crossing Layout PDF
Hao SAN, Akira HAYAKAWA, Yoshitaka JINGU, Hiroki WADA, Hiroyuki HAGIWARA, Kazuyuki KOBAYASHI, Haruo KOBAYASHI, Tatsuji MATSUURA, Kouichi YAHAGI, Junya KUDOH, Hideo NAKANE, Masao HOTTA, Toshiro TSUKADA, Koichiro MASHIKO, Atsushi WADA 908-915
High-Speed Continuous-Time Subsampling Bandpass ΔΣ AD Modulator Architecture Employing Radio Frequency DAC PDF
Masafumi UEMORI, Haruo KOBAYASHI, Tomonari ICHIKAWA, Atsushi WADA, Koichiro MASHIKO, Toshiro TSUKADA, Masao HOTTA 916-923
Nonlinear Blind Source Separation Method for X-Ray Image Separation PDF
Nuo ZHANG, Jianming LU, Takashi YAHAGI 924-931
A Hardware Implementation of a Content-Based Motion Estimation Algorithm for Real-Time MPEG-4 Video Coding PDF
Shen LI, Takeshi IKENAGA, Hideki TAKEDA, Masataka MATSUI, Satoshi GOTO 932-940
Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation PDF
Gen FUJITA, Takaaki IMANAKA, Hyunh Van NHAT, Takao ONOYE, Isao SHIRAKAWA 941-949
Speech Noise Reduction System Based on Frequency Domain ALE Using Windowed Modified DFT Pair PDF
Isao NAKANISHI, Yuudai NAGATA, Takenori ASAKURA, Yoshio ITOH, Yutaka FUKUI 950-959
An Active Noise Control System Based on Simultaneous Equations Method without Auxiliary Filters PDF
Mitsuji MUNEYASU, Osamu HISAYASU, Kensaku FUJII, Takao HINAMOTO 960-968
Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule PDF
Kazunori SHIMIZU, Tatsuyuki ISHIKAWA, Nozomu TOGAWA, Takeshi IKENAGA, Satoshi GOTO 969-978
Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC PDF
Yang SONG, Zhenyu LIU, Satoshi GOTO, Takeshi IKENAGA 979-988
Thermal-Aware Placement Based on FM Partition Scheme and Force-Directed Heuristic PDF
Jing LI, Hiroshi MIYASHITA 989-995
Selective Low-Care Coding: A Means for Test Data Compression in Circuits with Multiple Scan Chains PDF
Youhua SHI, Nozomu TOGAWA, Shinji KIMURA, Masao YANAGISAWA, Tatsuo OHTSUKI 996-1004
Practical Fast Clock-Schedule Design Algorithms PDF
Atsushi TAKAHASHI 1005-1011
Hardware Design Verification Using Signal Transitions and Transactions PDF
Nobuyuki OHBA, Kohji TAKANO 1012-1017
Synchronization Mechanism for Timed/Untimed Mixed-Signal System Level Design Environment PDF
Yu LIU, Satoshi KOMATSU, Masahiro FUJITA 1018-1026
Analysis of Automation Surprises in Human-Machine Systems with Time Information PDF
Masakazu ADACHI, Toshimitsu USHIO 1027-1034
Label Size Maximization for Rectangular Node Labels PDF
Shigeki TORIUMI, Hisao ENDO, Keiko IMAI 1035-1041
On Minimum k-Edge-Connectivity Augmentation for Specified Vertices of a Graph with Upper Bounds on Vertex-Degree PDF
Toshiya MASHIMA, Satoshi TAOKA, Toshimasa WATANABE 1042-1048
Experimental Evaluation of Maximum-Supply Partitioning Algorithms for Demand-Supply Graphs PDF
Satoshi TAOKA, Kazuya WATANABE, Toshimasa WATANABE 1049-1057
A Two-Stage Method for Single-Channel Speech Enhancement PDF
Mohammad E. HAMID, Takeshi FUKABAYASHI 1058-1068
A Novel Wavelet-Based Notch Filter with Controlled Null Width PDF
Yung-Yi WANG, Ying LU, Liang-Cheng LEE 1069-1075
Low-Voltage Analog Switch in Deep Submicron CMOS: Design Technique and Experimental Measurements PDF
Christian Jesus B. FAYOMI, Mohamad SAWAN, Gordon W. ROBERTS 1076-1087
Chaotification of the Van der Pol System Using Jerk Architecture PDF
Sinuhe BENITEZ, Leonardo ACHO, Ricardo J.R. GUERRA 1088-1091
Robust Chaotic Message Masking Communication over Noisy Channels: The Modified Chaos Approach PDF
Chian-Song CHIU, Tung-Sheng CHIANG, Peter LIU 1092-1099
Robust Fuzzy Integral Regulator Design for a Class of Affine Nonlinear Systems PDF
Tung-Sheng CHIANG, Chian-Song CHIU, Peter LIU 1100-1107
Fingerprinting Protocol for On-Line Trade Using Information Gap between Buyer and Merchant PDF
Minoru KURIBAYASHI, Hatsukazu TANAKA 1108-1115